1. Field of the Invention
This invention relates to solid state memories and more particularly to memories having multiplexing architecture.
2. Description of the Prior Art
In the past, a memory system having a given number of memory cells had those cells arranged in a single array of columns and rows. Access times to such memories is limited by the length of the column and row interconnecting lines and the attendant loading, as well as the loading on the outputs of the sense amplifiers for the entire array. This loading reduces the speed of accessing such a memory.